#endif
// FIXME: turn off for now... fix zero'ing regs, should be bank1?
-//#define HANDLE_AR_UNAT
+#define HANDLE_AR_UNAT
// FIXME: This is defined in include/asm-ia64/hw_irq.h but this
// doesn't appear to be include'able from assembly?
.mem.offset 8,0; st8.spill [r3]=r29,16 ;;
.mem.offset 0,0; st8.spill [r2]=r30,16;
.mem.offset 8,0; st8.spill [r3]=r31,16 ;;
- movl r31=XSI_IPSR;;
- bsw.0 ;;
- mov r2=r30; mov r3=r29;;
#ifdef HANDLE_AR_UNAT
// bank0 regs have no NaT bit, so ensure they are NaT clean
- mov r16=r0; mov r17=r0; mov r19=r0;
- mov r21=r0; mov r22=r0; mov r23=r0;
+ mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
+ mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
+ mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
+#endif
+ bsw.0 ;;
+ mov r2=r30; mov r3=r29;;
+#ifdef HANDLE_AR_UNAT
mov ar.unat=r28;
#endif
adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;
.mem.offset 8,0; st8.spill [r3]=r29,16 ;;
.mem.offset 0,0; st8.spill [r2]=r30,16;
.mem.offset 8,0; st8.spill [r3]=r31,16 ;;
+#ifdef HANDLE_AR_UNAT
+ // bank0 regs have no NaT bit, so ensure they are NaT clean
+ mov r16=r0; mov r17=r0; mov r18=r0; mov r19=r0;
+ mov r20=r0; mov r21=r0; mov r22=r0; mov r23=r0;
+ mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
+ mov r28=r0; mov r29=r0; mov r30=r0; movl r31=XSI_IPSR;;
+#endif
movl r31=XSI_IPSR;;
bsw.0 ;;
mov r2=r30; mov r3=r29;;
#ifdef HANDLE_AR_UNAT
- // bank0 regs have no NaT bit, so ensure they are NaT clean
- mov r16=r0; mov r17=r0; mov r19=r0;
- mov r21=r0; mov r22=r0; mov r23=r0;
- mov r24=r0; mov r25=r0; mov r26=r0; mov r27=r0;
mov ar.unat=r28;
#endif
adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;